A known electrically rewritable and highly integratable non-volatile semiconductor memory device is a NAND flash memory. The NAND flash memory includes a NAND string in which a plurality of memory cells are connected in series and the adjacent memory cells share a source/drain diffusion layer. The NAND string has ends connected to a bit-line and a source-line, respectively, via a select gate transistor. Such a NAND string configuration allows for a smaller unit cell area and a larger capacity than a NOR flash memory.
The memory cell in the NAND flash memory includes a semiconductor substrate and a tunnel insulating film, a charge accumulation layer (floating gate), an inter-gate dielectric film, and a control gate, which are stacked in this order on the substrate. The memory cell stores data in a non-volatile manner according to the charge accumulation state of the floating gate. The memory cell stores binary data using, for example, data “0” representing the higher threshold voltage state in which the floating gate is injected with electrons and data “1” representing the lower threshold voltage state in which electrons in the floating gate are discharged. The threshold voltage distribution to be written may be further divided to provide a multi-level storage such as four-level or eight-level storage.
The write of data to the NAND flash memory usually includes a program operation of accumulating charges in the charge accumulation layer to record data and a verify operation of verifying whether desired data is recorded by the program operation.
As the NAND flash memory has recently become smaller, a coupling noise between the adjacent memory cells tends to make it difficult to have a normal verify or an accurate program, thereby broadening the threshold voltage distribution. The same holds true for the charge-trap type non-volatile memory in which the charge accumulation layer includes an insulating film such as an MONOS film.